The present invention relates to the use of operational amplifiers (op amps) in differential signal architectures. More specifically, the present invention provides techniques by which the performance of op amps which generate differential signals may be enhanced.
In analog integrated circuits, electrical signals are often processed in differential form, i.e., each signal has a paired counterpart of equal amplitude and opposite phase. Differential architectures are employed for a number of reasons including, for example, the fact that differential architectures exhibit significantly better power supply noise rejection than single-ended designs. Op amps are among the most common circuit components in differential systems. FIG. 1 shows an op amp circuit which is commonly employed in differential designs.
FIG. 1 shows a circuit 100 for converting an incoming single-ended signal Vin to a differential signal represented by V+ and V-. Such circuits are common where, for example, an integrated circuit with a differential architecture is embedded in a larger system where it must interface with single-ended signals. The conversion from a single-ended to a differential signal involves using a first op amp 1 as an input buffer and a second op amp 2 to create a phase-inverted counterpart of Vin. Both the original in-phase signal (V-) and the phase-inverted version (V+) are then fed to subsequent differential circuitry (e.g., op amp 3). The buffering provided by op amp 1 provides a low impedance signal to subsequent circuits. While this is desirable, it does not come without a cost. That is, the addition of a stage of amplification adds noise, distortion, offset, and possibly other undesirable effects.
As shown in FIG. 1 with reference to op amp 1 and assumed for the op amps in each of the figures described herein, the noise voltage associated with each op amp is modeled as an input referred noise voltage source Vn. The input-referred noise sources for specific op amps will be identified by a reference number subscript. That is, the noise source for op amp 1 is denoted Vn.sub.1. The noise values are given in squared noise voltage, e.g., Vn.sub.1.sup.2. As will be understood and assuming the noise sources are uncorrelated, a weighted sum of these noise voltages is calculated as the square root of the sum of the squares. As will also be understood, the input gain is set by the ratio of resistor value R2 to resistor value R1. Resistor values for R3 and R4 are equal in value to ensure that V+is equal in amplitude to V- as well as being opposite in phase. Op amp 3 and resistors R5-R8 are shown as representative of differential circuitry which might follow the single-ended to differential conversion, but will not be further discussed here. The key parameter of interest is the noise voltage presented to the equivalent input of the differential circuitry, i.e., Vdiff =(V+)-(V-). The expression for the noise voltage at V- is: EQU Vn.sup.2 (V-)=Vn.sub.1.sup.2 (1+R2/R1) (1)
The expression for the noise voltage at V+ is: EQU Vn.sup.2 (V+)=Vn.sub.2.sup.2 (1+R4/R3)-Vn.sub.1.sup.2 (1+R2/R1)(R4/R3) (2)
Since R3=R4: EQU Vn.sup.2 (V+)=2 Vn.sub.2.sup.2 -Vn.sub.1.sup.2 (1+R2/R1) (3)
Then the noise presented at the input to op amp 3 may be represented as follows: ##EQU1##
It can be seen that the noise voltage of the input buffering amplifier, Vn.sub.1.sup.2, is amplified by the non-inverting gain configuration of op amp 1, and applied to the V- input of the differential circuitry. This same amplifier noise voltage is also phase-inverted an applied to the V+ input of the differential circuitry. Thus, Vn.sub.1.sup.2 is effectively amplified by both op amp 1 and op amp 2. This then calls for a particularly low-noise op amp in the op amp 1 position in order to minimize its noise contribution. As will be understood, low-noise op amps are expensive both in terms of money and silicon.
It is therefore desirable to provide techniques by which the noise performance of op amps in differential architectures may be improved.